1. Field of the Invention
This invention relates to phase locked loops (PLLs), and more specifically to improving PLL jitter performance and stability.
2. Background
As product frequencies get higher every generation, a system becomes less tolerant to clock jitter. In systems using charge pump phase locked loops (PLLs) as clock generators, one of the main sources of clock jitter under normal phase-locked condition is the control voltage glitch. This glitch is the result of imperfections in the actual circuit behavior, particularly the combined response of the phase-frequency detector (PFD) output and charge pump (CP) mismatches. While the PFD outputs can usually be matched reasonably well, the mismatches in the CP are difficult to correct. This is especially true for PLLs using self-biasing techniques.
Currently, several ways are used in an attempt to resolve the problem. First, the loop filter capacitance is increased to lower the control voltage glitch magnitude. However, by doing this, the entire closed-loop response of the PLL is changed. For example, if the loop filter capacitance is increased relative to the charge pump current, the damping factor is also reduced which means degradation of the loop stability.
Secondly, a sample-and-reset approach has been proposed to spread the control voltage glitch over the entire reference period. The circuit implementation using this approach is non-trivial. This approach requires voltage switches within the analog section of the PLL, making the sensitive control voltage vulnerable to feed-through, charge injection and/or substrate coupling noises. In addition, the design complexity is significantly increased, hence, increasing risk.
Thirdly, a charge pump spreading approach is recently being introduced. This approach uses two copies of the charge pump, and they both are connected to the loop filter. One charge pump works in the conventional manner while the second charge pump receives a time-delayed version of the PFD outputs. However, using this approach requires twice as many charge pumps (i.e., twice the area). Further, with two copies of the charge pump the increased leakage current at the last stage of the charge pumps as well as its finite AC response may increase the static phase error.